RISC-V RVA23 Profile Analysis

This interactive tool breaks down the RVA23 Profile (User-mode and Supervisor-mode), tracking the status of standard extensions and their inclusion in the Linux Kernel v6.18 Device Tree (checked against v6.19-rc1: no RVA23 DT binding deltas). Use the dashboard to gauge compliance and the explorer to drill down into specific instruction set extensions.

Note 1: Linux kernel v6.18 supports if the extension string exists in file extensions.yaml and cpus.yaml.

Note 1b: Comparing v6.19-rc1 extensions.yaml and v6.19-rc1 cpus.yaml shows no additional RVA23-relevant tokens beyond v6.18 in these DT bindings.

Note 2: QEMU rva23s64 is dumped from: qemu-system-riscv64 version 10.1.92 (v10.2.0-rc2-7-g1053bb627c), launched with -machine virt,acpi=off -cpu rva23s64.

Compliance Dashboard

High-level overview of profile composition and implementation readiness.

Total Extensions
0
Mandatory Exts
0
New in RVA23
0
Linux v6.18 Coverage
0% of Mandatory

Gap Analysis

Identifying Mandatory extensions that are currently missing or unsupported in the target implementations.

Mandatory Extension Coverage

Linux v6.18 Device Tree coverage for Mandatory extensions.

Missing in Linux v6.18 DT

Mandatory extensions not explicitly found in standard DT bindings.

Extension Explorer

Search, filter, and inspect individual extensions. Use the controls to narrow down the view.

Extension ↕ Profile ↕ Status ↕ History ↕ Commit ID ↕ Lore ↕ Merged In ↕ Linux v6.18 ↕ QEMU rva23s64 ↕
Showing 0 extensions

Appendix: Linux Kernel References

Deep links to upstream sources that justify individual coverage decisions.

Extension Spotlight

Supm — Userspace Pointer Masking

Mandatory · RVA23U64

Linux enables Supm automatically on 64-bit systems and aliases the capability to whichever pointer-masking extension (Smnpm or Ssnpm) firmware reports, ensuring the Explorer’s “Yes” status.

Kernel Config

arch/riscv/Kconfig
config RISCV_ISA_SUPM
	bool "Supm extension for userspace pointer masking"
	depends on 64BIT
	default y
	help
	  Add support for pointer masking in userspace (Supm) when the
	  underlying hardware extension (Smnpm or Ssnpm) is detected at boot.

	  If this option is disabled, userspace will be unable to use
	  the prctl(PR_{SET,GET}_TAGGED_ADDR_CTRL) API.
                            

'default y' ties Supm exposure directly to firmware-reported hardware capabilities.

#ifdef CONFIG_RISCV_M_MODE
#define RISCV_ISA_EXT_SxAIA		RISCV_ISA_EXT_SMAIA
#define RISCV_ISA_EXT_SUPM		RISCV_ISA_EXT_SMNPM
#else
#define RISCV_ISA_EXT_SxAIA		RISCV_ISA_EXT_SSAIA
#define RISCV_ISA_EXT_SUPM		RISCV_ISA_EXT_SSNPM
#endif
                            

The mapping surfaces Supm to user space whether the platform boots in M-mode ('Smpnm') or S-mode ('Ssnpm').

Extension Spotlight

Zic64b — 64 Byte Cache Blocks

Mandatory · RVA23U64

Linux does not require a literal 'zic64b' string in Device Tree. Instead, the binding mandates cache block size properties so the kernel can validate the 64-byte requirement that accompanies Zic64b.

  • 'riscv,cbom-block-size', 'riscv,cbop-block-size', and 'riscv,cboz-block-size' must be provided per hart.
  • Each property encodes the cache block size (in bytes) for the corresponding CBO operation family.
  • For Zic64b-compliant platforms these values are set to 64, satisfying the RVA23 requirement the Explorer checks.

Because the block sizes are explicit, Linux can enforce Zic64b semantics even without parsing a 'zic64b' ISA string.

Extension Spotlight

Ssstateen — State Enable Controls

Mandatory · RVA23S64 (Sha)

Linux doesn’t require a distinct 'ssstateen' token in Device Tree. When DT advertises 'smstateen', the binding guarantees that the state-enable machinery controlling CSR visibility across H/S/VS/U/VU modes is present, so 'Ssstateen' is marked as covered by the Linux Kernel.

        - const: smstateen

          description: |

            The standard Smstateen extension for controlling access to CSRs

            added by other RISC-V extensions in H/S/VS/U/VU modes and as

            ratified at commit a28bfae (Ratified (#7)) of riscv-state-enable.
                            
  • The schema exposes only the lowercase 'smstateen' string; there is no separate 'ssstateen' property.
  • By definition this entry covers CSR gating in all hypervisor-visible modes, which is the behavior RVA23S64 (Sha) mandates for 'Ssstateen'.